| Hierarchy |
Input |
Constant Input |
Unused Input |
Floating Input |
Output |
Constant Output |
Unused Output |
Floating Output |
Bidir |
Constant Bidir |
Unused Bidir |
Input only Bidir |
Output only Bidir |
| clk_out_lvds |
1 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| lvds_receiver_chB|ALTLVDS_RX_component|auto_generated |
10 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| lvds_receiver_chB |
10 |
18 |
0 |
18 |
32 |
18 |
18 |
18 |
0 |
0 |
0 |
0 |
0 |
| lvds_receiver_chA|ALTLVDS_RX_component|auto_generated |
10 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| lvds_receiver_chA |
10 |
18 |
0 |
18 |
32 |
18 |
18 |
18 |
0 |
0 |
0 |
0 |
0 |
| ext_pll_inst|altpll_component|auto_generated |
3 |
0 |
0 |
0 |
11 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| ext_pll_inst |
2 |
2 |
0 |
2 |
4 |
2 |
2 |
2 |
0 |
0 |
0 |
0 |
0 |